Documentation

Cslib.Computability.Circuit.Basic

Circuits #

A circuit is a straight-line Program together with a choice of output wires. Any input or internal-gate wire may be designated as an output, and designating an output is free: projections and duplicated outputs cost no gates. The size of a circuit is its gate count and its depth is the maximum depth of a designated output wire.

For the standard Boolean circuit model, see Arora and Barak, Section 6.1. Here a topological ordering is part of the representation, and the Boolean gate basis is generalized to an arbitrary Signature and Interpretation. Our size counts only operation gates; Arora and Barak count all nodes, including inputs. An output wire may also supply a later gate.

This file defines evaluation (Circuit.eval), the flattened views Circuit.computation and Circuit.trace, the zero-gate identity circuit Circuit.id, and the structural bounded-fan-in predicate Circuit.FanInAtMost. Evaluation commutes with homomorphisms (Circuit.map_eval).

References #

structure Cslib.Circuits.Circuit (σ : Signature) (inputCount gateCount outputCount : ) :
Type u_1

A straight-line program with designated output wires.

  • program : Program σ inputCount gateCount

    The internal gates of the circuit.

  • outputs : Fin outputCountWire inputCount gateCount

    The input or internal-gate wire carrying each output.

Instances For
    def Cslib.Circuits.Circuit.id (σ : Signature) (inputCount : ) :
    Circuit σ inputCount 0 inputCount

    The zero-gate identity circuit, whose outputs are its inputs.

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      def Cslib.Circuits.Circuit.FanInAtMost {σ : Signature} {inputCount gateCount outputCount : } (c : Circuit σ inputCount gateCount outputCount) (r : ) :

      Every gate in a circuit has at most r arguments.

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        @[instance_reducible]
        instance Cslib.Circuits.Circuit.instDecidableFanInAtMost {σ : Signature} {inputCount gateCount outputCount : } (c : Circuit σ inputCount gateCount outputCount) (r : ) :

        Bounded fan-in is decidable for every concrete circuit.

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        def Cslib.Circuits.Circuit.size {σ : Signature} {inputCount gateCount outputCount : } :
        Circuit σ inputCount gateCount outputCount

        The number of gates in a circuit. Designating outputs is free.

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          def Cslib.Circuits.Circuit.outputDepths {σ : Signature} {inputCount gateCount outputCount : } (c : Circuit σ inputCount gateCount outputCount) :
          Fin outputCount

          The depth of every designated output wire in a circuit.

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            def Cslib.Circuits.Circuit.depth {σ : Signature} {inputCount gateCount outputCount : } (c : Circuit σ inputCount gateCount outputCount) :

            The maximum depth of a designated output wire in a circuit.

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              def Cslib.Circuits.Circuit.eval {σ : Signature} {inputCount gateCount outputCount : } {U : Type u} (c : Circuit σ inputCount gateCount outputCount) (i : Interpretation σ U) (x : Fin inputCountU) :
              Fin outputCountU

              Read the designated output wires after evaluating the program.

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                def Cslib.Circuits.Circuit.Computes {σ : Signature} {inputCount gateCount : } {U : Type u} (c : Circuit σ inputCount gateCount 1) (interpretation : Interpretation σ U) (f : (Fin inputCountU)U) :

                A single-output circuit computes f when its output agrees with f on every input.

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                • c.Computes interpretation f = ∀ (x : Fin inputCountU), c.eval interpretation x 0 = f x
                Instances For
                  @[simp]
                  theorem Cslib.Circuits.Circuit.eval_id {σ : Signature} {inputCount : } {U : Type u} (interpretation : Interpretation σ U) (input : Fin inputCountU) :
                  (id σ inputCount).eval interpretation input = input
                  theorem Cslib.Circuits.Circuit.map_eval {σ : Signature} {inputCount gateCount outputCount : } {U₁ : Type u₁} {U₂ : Type u₂} {i₁ : Interpretation σ U₁} {i₂ : Interpretation σ U₂} (c : Circuit σ inputCount gateCount outputCount) (h : Homomorphism i₁ i₂) (x : Fin inputCountU₁) :
                  h.map c.eval i₁ x = c.eval i₂ (h.map x)

                  Evaluating a circuit commutes with a homomorphism.

                  def Cslib.Circuits.Circuit.computation {σ : Signature} {inputCount gateCount outputCount : } {U : Type u} (c : Circuit σ inputCount gateCount outputCount) (i : Interpretation σ U) (x : Fin inputCountU) :
                  Fin (gateCount + outputCount)U

                  All internal-gate values followed by the designated output values.

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                    def Cslib.Circuits.Circuit.trace {σ : Signature} {inputCount gateCount outputCount : } {U : Type u} (c : Circuit σ inputCount gateCount outputCount) (i : Interpretation σ U) (x : Fin inputCountU) :
                    Fin (inputCount + gateCount + outputCount)U

                    The input and internal-gate values followed by the designated outputs.

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